Hi
As CPU and memory protection is probably moving towards CHERI MMU protection?
Which today is supported on RISCV and ARM based CPU.

Wouldnt that be super to have in AROS, as this benefits performance of microkernels which Linus Torwald in the past told why he selected a Monolitic kernel based on that context switching is painful.
But with CHERI MMU it is little painful as calling a function in a program.
This will be a big thing for microkernel design according to me.

Another nice thing is the message passing, zero copying of messages.
That was one of the best core functionality in AmigaOS that I loved.
That is also included in CHERI.

Would love to hear how you see this?

Also RISCV is heavily improved, and who knows when but I would not be surprised if there would be many new pricy hardware coming soon, that also have performance that makes it really interesting.
Russia, China and many countries are active in this development.
Would be interesting to hear what you think of this?

Regards Tomas